Journal of Systems Engineering and Electronics ›› 2026, Vol. 37 ›› Issue (5): 1429-1437.doi: 10.23919/JSEE.2026.000168

• ELECTRONICS TECHNOLOGY •    

Dual-counters-based real-time 1D phase unwrapping algorithm in laser measurement and sensing applications

Wei Ke1(), Longbiao He2(), Feng Niu2(), Ping Yang2(), Rong Fan1(), Yin Cao1, Xiujuan Feng2,*(), Lijing Li1,*()   

  1. 1School of Instrumentation and Optoelectronic Engineering, Beihang University, Beijing 100191, China
    2Institute of Mechanics and Acoustic Metrology, National Institute of Metrology, Beijing 100029, China
  • Received:2024-10-24 Accepted:2026-09-28 Online:2026-10-18 Published:2026-11-09
  • Contact: Xiujuan Feng, Lijing Li E-mail:david_tfsy@outlook.com;helb@nim.ac.cn;niufeng@nim.ac.cn;yangp@nim.ac.cn;fanrong_buaa@outlook.com;fxj@nim.ac.cn;lilijing@buaa.edu.cn
  • Supported by:
    This work was supported by the National Natural Science Foundation of China (52075513).

Abstract:

Heterodyne laser interferometer has been widely used for displacement and velocity measurements in the fields of vibration calibration and acoustic metrology. When the displacement or velocity to be measured exceeds a certain limit, the phase of the heterodyne interference signal, corresponding to different displacement or velocity amplitudes, is wrapped within the range of (−π, +π], and various phase unwrapping methods have been proposed to obtain the corresponding true phase. However, these methods are computationally intensive and require large memory and expensive hardware resources, thus hindering the development of real-time, embedded solutions for wide bandwidth measurement applications. In this study, a one-dimensional dual-counters-based phase unwrapping (1D DCPU) algorithm is proposed to achieve real-time phase unwrapping while utilizing minimal resources, which can be easily implemented on a field programmable gate array (FPGA) in real-time. The performance of this 1D DCPU algorithm is simultaneously demonstrated by the simulated and experimental results on the FPGA in the frequency range of 10−500 kHz. The proposed 1D DCPU algorithm offers the advantages of small computation and high-efficiency operation on FPGA, which is especially suitable for the large bandwidth, embedded and real-time sensing applications.

Key words: Doppler signal, laser heterodyne interferometer, phase unwrapping, velocity measurement