Journal of Systems Engineering and Electronics ›› 2009, Vol. 20 ›› Issue (1): 55-59.

• ELECTRONICS TECHNOLOGY • Previous Articles     Next Articles

Design and implementation of 1 GHz high speed data acquisition system

Zou Lin, Wang Xuegang & Qian Lu   

  1. School of Electronic Engineering, Univ. of Electronic Science and Technology of China,                                 Chengdu 610054, P. R. China
  • Online:2009-02-18 Published:2010-01-03

Abstract:

With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits (ENOB) is more than 6.5 bits.