Journal of Systems Engineering and Electronics ›› 2014, Vol. 25 ›› Issue (3): 393-398.doi: 10.1109/JSEE.2014.00045

• ELECTRONICS TECHNOLOGY • Previous Articles     Next Articles

Efficient matrix inversion based on VLIW architecture

Li Zhang, Fu Li*, and Guangming Shi   

  1. School of Electronic Engineering, Xidian University, Xi’an 710071, China
  • Online:2014-07-01 Published:2010-01-03


Matrix inversion is a critical part in communication, signal processing and electromagnetic system. A flexible and scalable very long instruction word (VLIW) processor with clustered architecture is proposed for matrix inversion. A global register file (RF) is used to connect all the clusters. Two nearby clusters share a local register file. The instruction sets are also designed for the VLIW processor. Experimental results show that the proposed VLIW architecture takes only 45 latency to invert a 4 × 4 matrix when running at 150 MHz. The proposed design is roughly five times faster than the DSP solution in processing speed.